Instructor: Alexander Gnusin, ALDEC
Outline: FAA and EASA recommend the use of HDL coding standards as part of the overall verification plan for DO-254 projects. This tutorial outlines best-practices and examples of HDL coding standards.
- VHDL Code best-practices and static code verification - the following topics will be discussed and illustrated with VHDL code examples:
a. Secure code practices: safe data types and packages, range declarations, bit width matching and sensitivity lists verification
b. Secure coding styles for design review
c. Secure implementation (synthesis) practices: case overlapping and completeness, unreachable conditions and requirements to processes - Clocks and resets verification - the following topics will be discussed and illustrated with VHDL code examples:
a. Semi-Automated Design constraints development
b. Clock tree verification
c. Reset tree verification
d. Clock Domain crossing verification for designs with multiple clocks
e. Quality reports and connectivity explorations
In addition, we will outline best-practices of using Static Code verification tools in overall design
About the Instructor: Alexander Gnusin has 22 years of hands-on Design and Verification experience, gained in well-known design houses - Motorola Semi, IBM, Nortel Networks, and Ericsson. As Verification Prime for multi-million gates projects, he combined various verification methods - LINT, Formal Property checking, dynamic simulation, hardware-assisted acceleration in order to efficiently achieve design verification goals and to ensure the high-quality design verification.
